Yuan-Pin Huang

RTL-level Designer

Experience in RTL-level design.
Development FPGA/CPLD on server board.
Firmware development on Micro-controller(AVR).
Familiar with low speed interface.(I2C/SGPIO...)
Program in Verilog/VHDL, C++, python.

Contact

Mobile Number
+886 988 265583

Email
ryan6309@gmail.com

Skill summary

RTL-level Design

Implement Power Sequence/Interface bus/Debug tool on Intel/AMD platform.
Develop I2C auto switch and published

MCU development

Develop according to spec, debug using I2C/UART.
Build function for different platform.

AI research

Learning from MOOC, share knowledge with team mate.
Develop AI application for COMPUTEX TAIPEI

Work Experience

2015 - Present

Senior Engineer

Wiwynn Corporation.

New Taipei City, Taiwan

CPLD/FPGA
- Server board function implement and maintain on Intel/AMD platform.
- Co-work with other team, build test function to find the root cause.
- Implement customer require function.

Micro-controller
- Based on AVR controller.
- Implement OCP Debug Card with LCD F/W.

AI research
- Research AI application on multi platform. (CPU,GPU,FPGA)
- Demonstrate AI result for COMPUTEX TAIPEI 2018.

Education

2013 - 2015

Master of Computer Science

National Taiwan Normal University

Taipei, Taiwan

2009 - 2013

Bachelor of Computer Science

National Taipei University of Education

Taipei, Taiwan

Portfolio

DATA TRANSMISSION APPARATUS AND METHOD THEREOF